FPGA and Emulation Engineer
The work
Prototype bring-up on large FPGA, emulation flows, and pre-silicon validation on hardware where the timing is real and the bugs are physical.
You would own
The prototype platform — partitioning, build flow, timing closure, debug infrastructure, and getting the design to actually run.
Your first quarter
The board is arriving now. Your first quarter is bringing it up: memory backend, timing closure, and the first time the whole design runs on real hardware.
We look for
Large-FPGA prototyping at SoC scale. Partitioning and timing closure. Hardware debug at the bench, with instruments, at two in the morning.
Why it matters
The first point where firmware meets physics, and where the schedule is won or lost before tape-out.
Apply
Email careers@felsite.com with what you have worked on that you would want to talk about, a link to anything public, and where you are and what you are looking for. No cover letter.
Every application answered within five working days.